Through-silicon-via (TSV) technology is a method for making vertical electrical connections through a substrate (silicon wafer or die) on which integrated circuits (ICs) have been fabricated. TSV technology makes it possible to achieve much higher density of interconnection and therefore much higher functionality with a very small footprint in the form of a 3D packaged IC that has several silicon wafers or dies stacked vertically. Because TSV can be incorporated into the front end of the line processing (FEOL), it is a more attractive alternative compared to techniques like flipchip packaging or wirebonding.
Key process steps for TSV include via formation, isolation, metallization and filling. PVD magnetron sputtering is widely used for barrier / seed layer deposition of TSV because of higher deposition rate and superior quality of deposited films. Step coverage plays a very important role in TSV process and is a concern especially for high aspect ratio structures because continuous and good coverage on sidewalls and bottom corners of the via is necessary for subsequent electroplating. Key parameters to control for good step coverage are (a) Ar gas pressure (b) DC power, and (c) substrate temperature.